Design Emulation Engineer
Responsibilities
• Emulation model bring up: testbench, compilation, sanity testcases, debug etc.
• Release emulation model to enable model consumers (software, validation et al)
• Support model consumers on accomplishing their goals: root-cause issues, apply/deliver fixes etc.
• Testbench development and transactors’ integration to support interfaces such as JTAG, DDR, SGMII/Ethernet, PCIe, UART, USB, SPI etc
• Develop utilities to support running/testing of emulated designs (DDR preloads, PCIe loopback etc.)
• Interface with Architecture team, IP design, SoC Design, Software development, and Validation team to collect requirements for emulation
• Create detailed emulation plans and review with stakeholders; Execute to plan.
• Create/document test scenarios to validate emulated design
• Provide detailed emulator model release document for users
• Triage issues found in emulation with design and verification experts to root cause
• Develop/maintain regression suite for testing and release emulated design
Qualifications:
- Master’s Degree in Electrical Engineering or Computer Engineering or Computer Science
- Up to 2 years relevant work experience, including internships
- Excellent problem-solving skills
- Ability to quickly learn/adapt new technologies
- Hardware Languages: Verilog, SystemVerilog
- Programming Languages: C, C++
- Scripting: Perl, Tcl, Unix
- Course work in Digital Design, Computer Architecture, VLSI Design, FPGAs, is preferred
- Synopsys Zebu or Synopsys HAPS or Mentor Veloce or Cadence Palladium/Z1 knowledge, is preferred